In recent years, there has been popularized to use a liquid crystal display element as a display means in pocket televisions and office machines such as word processor. Besides this, there is also a contact type line sensor having a reading part of the same size as an original in a minuature facsimile.
In such devices, a plurality of elements such as liquid crystal cells, photosensor cells, etc. are array-like arranged either in one-dimensional state or in two-dimensinal state. In order to actuate each of such elements as arranged in a device, there is usually employed an electrode forming methods by means of bonding techniques or other method by way of a matrix electrode forming technique. However many of these methods are problematic for the reason that it is difficult to make those element to effectively exhibit their functions as desired and it makes a device costly.
In view of this, there is an increased demand to provide a simplified transistor of which constituent elements being arranged on a substrate which will make improvements in the quality of an image to be displayed and reading speed, and also in the cost of a product.
In order to reply to the above demand, there have been proposed field effect transistors of insulating gate type (hereinafter referred to as "IG-FET") of which constituent elements are an amorphous silicon film deposited by way of a glow discharge method or from a polycrystal silicon film deposited by way of a thermal induced chemical vapor deposition method as shown in FIG. 9. In FIG. 9, there is shown a substrate (glass plate) 901, channel forming region 902, drain region 903, source region 904, drain electrode 905, source electrode 906, gate insulating film 907 and gate electrode 908.
However, as for such electric field effect transistors of insulating gate type as shown in FIG. 9, although its preparation process is relatively simple, there are problems due to undesired influences of an interface level and the like and other than this, it is difficult to coordinate the characteristics of a plurality of the constituent elements and it is also difficult to raise the reproducibilities of the characteristics to be exhibited by said plurality of the constituent elements principally because of utilizing a semiconductor part adjacent to the gate insulating film.
Other than the above IG-FET, there has been proposed a junction type thin film transistor (hereinafter referred to as "J-TFT") as shown in FIG. 10.
In FIG. 10, there are shown a n.sup.+ wafer 1001, collector region 1002, base region 1003, emitter region 1004, base electrodes 1005 and 1006, and emitter electrode 1007.
And this J-TFT has been evaluated as being better than the above IG-FET since it is less problematic for the problem relating to the influence caused by interfaces.
However, in the case of the J-TFT, being different from the foregoing IG-FET, when its semiconductor layer is formed from an amorphous silicon film or a polycrystal silicon film, there are problems such as were mentioned before. Because of this, such films are seldom used. Instead, it is usual to a single-crystal film such as single-crystal silicon film to constitute the semiconductor layer.
That is, in the case where the semiconductor layer of the J-TFT is constituted by an amorphous silicon film or a polycrystal silicon film, minority electric carriers injected from the emitter region will be recombined in the base region and it will become impossible for said minority carriers to be injected into the collector region due to that the diffusion length (L) of a minority electric carrier being extremely short in the amorphous silicon film. And in the case of using a polycrystal amorphous silicon, it is difficult to make such a desired junction so as to impart a good reverse bias due to the facts that the diffusion length (L) of a minority electric carrier is substantially short therein because of grain boundaries among the grains and electric current flows along such boundaries.
By the way, in the case where the semiconductor layer of the J-TFT is made from a single-crystal silicon film, there are unsolved problems that there are certain limits upon the scale and the kind of a J-TFT to be prepared and in any case, a product will unavoidably become costly.
In this respect, there is a demand to provide a process which makes it possible to prepare a semiconductor layer for a J-TFT using an amorphous silicon film or a polycrystal silicon film since the allowable use ranges for such films are much wider than that for a single-crystal silicon film although such films are accompanied with the foregoing problems.
In order to meet said demand, various studies have been made on an amorphous silicon film and a polycrystal silicon film. In fact, there has been made the thought that the foregoing problems on said films could be solved as long as it becomes possible to sufficiently enlarge the sizes of grains in said films and as a result, it will become possible to realize a practically applicable J-TFT using such films. On the basis of this thought, there has been made a proposal that the formation of a polycrystal silicon film to constitute the semiconductor layer of a J-TFT is carried out while maintaining the temperature of a substrate at an elevated temperature of more than 400.degree. C. to thereby enlarge the sizes of grains caused in a film to be formed. This proposal is effective in certain aspects.
However, there problems for this proposal that it is impossible to use a commercially available substrate such as glass plate because a substrate is required to maintain at an elevated temperature and such substrate is not tolerative against such elevated temperature, and because of this, the kind of a substrate should be limited to a highly heat resistant one such as sapphire, silicon wafer, etc. which are expensive and the resulting J-TFT product will eventually become costly.
In addition, in the case of making a desired semiconductive junction in the preparation of a J-TFT using as the semiconductor layer a polycrystal silicon film deposited on a substrate such as glass plate which is not tolerative against an elevated temperature, it is almost impossible to practice a diffusion method and in most cases, there is employed an ion implantation method for which a specific equipment which is highly expensive is required to provide.